Gisele Beatrice Sonfack

PhD Overview

This thesis presents a new technique of analog-to-digital conversion (ADC), based on FPGA-assisted optimal duty cycle modulation (ODCM). The ODCM problem is broken down into two decoupled optimal sub-problems, duty cycle modulation (DCM) and digital filtering. Three lemmas and four morphological theorems, established and demonstrated, make it possible to model the DCM sub-problem in the form of a nonlinear functional criterion with nonlinear constraints, and then to solve it by the Matlab fmincon tool. Moreover, the functional criterion of the sub-problem of digital filtering, is described by the Hölder norm of order p of the error of the frequency response of the demodulator digital filter, with a view to an optimization by the tool iirlpnorm of Matlab. A virtual prototype of ADC-ODCM, is implemented using three complementary design tools that are: Simulink, the Simulink / Xilinx system generator and the Xilinx ISE tool. The retained virtual prototyping data offers a modulating bandwidth of 3 KHz, a maximum modulation frequency of 172 kHz and a sampling frequency of 25 MHz. The platform deployed for hardware co-simulation tests is equipped with a Zynq 7000 development kit for Xilinx FPGA target, a PC / laptop and two JTAG cables for connecting the kit to the PC. The quality values obtained under these conditions by testing the first experimental prototype of ADC-ODCM are: SNR = 70.45 dB, SFDR = 41.19 dB and NFR = 140 dB. These quality levels are laudable, compared to those offered under the same operational conditions by most over-sampling ADCs. Thus, the ADC-ODCM model initiated and prototyped in this thesis is a potential new technological solution for digital signal acquisition systems in industrial electronics.